Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!thunder.mcrcim.mcgill.edu!snorkelwacker.mit.edu!think.com!samsung!usc!elroy.jpl.nasa.gov!ncar!gatech!mcnc!rutgers!cbmvax!daveh From: daveh@cbmvax.commodore.com (Dave Haynie) Newsgroups: comp.sys.amiga.hardware Subject: Re: 32 bit memory??? Keywords: 32 bit memory is there really a difference???? Message-ID: <19089@cbmvax.commodore.com> Date: 18 Feb 91 18:31:02 GMT References: <887@caslon.cs.arizona.edu> Reply-To: daveh@cbmvax.commodore.com (Dave Haynie) Organization: Commodore, West Chester, PA Lines: 44 In article <887@caslon.cs.arizona.edu> dave@cs.arizona.edu (Dave P. Schaumann) writes: >Now this memory-CPU bus is sometimes called the Von Neuman (sp?) bottleneck, >since memory response time is typically ~10 times slower than the CPU clock >speed. This means that every time you want to read memory, the CPU has to >wait for about 10 clock cycles. >[...] >I'm not familiar with the hardware architecture of the 680x0 family, so I >can't really be more specific about Amiga hardware than that. I'm sure alot of other aren't either. It can be confusing. Perhaps the most confusing thing around is the clock speed vs. bus speed question. The 68000, for instance, has a 7.09MHz or 7.16MHz clock in Amiga systems. It takes the 68000 a minimum of 4 clock cycles to run a complete memory cycle. At 7.16MHz, this means that a minimal memory cycle is about 560ns long. We have had memory fast enough to cycle in that period for year. In fact, Chip RAM actually runs a 280ns cycle, one cycle for the CPU, one for display, when you have your normal Workbench screen up. Nearly all add-on memory boards for these systems run at the full speed. Now look at a typical 68030 based Amiga, like the A2630 or A3000. The 68030 gets a 25MHz clock, and takes only 2 clock cycles to run a complete memory cycle. This results in an 80ns cycle time. Even the fastest dynamic memories around can't get close to that (the _cycle_ time on a part is roughly twice the indicated access time, so typical 80ns DRAMs need 160ns to cycle fully). The typical 25MHz 68030 memory cycles in 200ns, or 5 clocks. That's enough to work with 100ns DRAM, if you have a very fast memory controller, or 80ns DRAM with a moderately fast DRAM controller. Motorola knew when they designed the '030 that it would have a hard time finding fast enough memory, so they added this "burst mode" that you often hear about. This is a specialized mode that matches closely to specialized DRAM modes to let 3 additional words be accessed fast once one is accessed at normal speed. The 68030 can read one of these extra words per clock. In the A3000, the memory system can provide such burst reads in two clocks per word. So, instead of reading 4 consecutive longwords in 20 clocks, the A3000 can do it in 11 clocks if there's static column memory in it. That averages to 2.75 clocks per word, close to the ideal time of 2 clocks per word. >Dave Schaumann | DANGER: Access holes may tear easily. Use of the access -- Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy "What works for me might work for you" -Jimmy Buffett