Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!elroy.jpl.nasa.gov!ncar!midway!chsun1!lee From: lee@chsun1.uchicago.edu (Dwight A Lee) Newsgroups: comp.sys.apple2 Subject: 65C02 ADC in Decimal Mode Summary: How are processor N and V flags set in decimal mode? Keywords: 65C02 assemble ADC decimal Message-ID: Date: 19 Feb 91 00:34:54 GMT Sender: news@midway.uchicago.edu (News Administrator) Organization: University of Chicago Lines: 24 I'm writing a function in C which needs to behave exactly like a 65C02 ADC (add with carry). Unfortunately, I am unable to find out just how the N (negative) and V (overflow) processor flags are set when the processor is in decimal mode. Either direct information or pointers to information sources would be appreciated. I seem to recall reading in Litchy & Eyes (_Programming the 65816_) that N and V were not used in decimal-mode ADC on the 6502, but that this was corrected in the 65C02 and later 65 processors. On a related note, how would negative decimal numbers be represented? Is there a standard way? If 99, for example, was used as a -1, wouldn't this limit one-byte representations to a single digit (for posible multiple-byte calculations) or to a lopsided range (if the high bit is used as in binary mode)? Thanks for any information. Email or post. Net summary will be provided if more than two "me too" requests are received. -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Dwight A Lee / lee@chsun1.uchicago.edu / T904107@niucs.BITNET / tCS/BB / Font I speak only for myself. / "I am not the only dust my mother raised" - TMBG