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From: phil@motaus.sps.mot.com (Phil Brownfield)
Newsgroups: comp.sys.m68k
Subject: Re: Debugging features on '040?
Message-ID: <1991Feb14.030933.18589@motaus.sps.mot.com>
Date: 14 Feb 91 03:09:33 GMT
References: <4bh=bBa00YU6MDQUlr@andrew.cmu.edu> <1991Feb10.214320.9974@grebyn.com>
Organization: Motorola Semiconductor, Austin, Texas
Lines: 29

In article <1991Feb10.214320.9974@grebyn.com> ckp@grebyn.com (Checkpoint Technologies) writes:
>If I may add an item to this query, I hear the 68040 chip has an
>on-board debug serial port, and I'm wondering how the chip supports this
>port.

The 040 supports JTAG boundary testing (IEEE 1149.1) and so has a
serial port for this function.  But JTAG is not anything useful for
software debugging.

So, perhaps someone said _68340_ and you heard _68040_?  All the 683XX
processors based on the CPU32 core (including the 340 and 332, among
others, but not the 68302) support what's called background mode.
Background mode is enabled/disabled at reset time.  If enabled, assertion
of the BKPT* pin, execution of the BGND instruction, or double bus faults
halt instruction execution and cause the CPU32 to enter background mode.
Via a serial port, it is possible to read/write address/data/supervisor
registers as well as memory, and a few other basic debugger primitives.
There are a few non-programming model registers accessible.  A couple
commands cause instruction execution to resume.  The serial interface
is more like that of SPI peripherals than that of traditional UARTs.

Details can be had in the 68340 User's Manual and the CPU32 Reference
Manual.  If I say more I'm afraid this may start to sound like a
commercial. :-(
-- 
Phil Brownfield
phil@motaus.sps.mot.com
{cs.utexas.edu!oakhill, mcdchg}!motaus!phil
Speaking for myself, not my employer.