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From: vlo@xydeco.siemens.com (John Vlontzos)
Newsgroups: comp.parallel
Subject: Re: iWARP and neural nets
Message-ID: <12936@hubcap.clemson.edu>
Date: 5 Feb 91 22:17:07 GMT
References: <12929@hubcap.clemson.edu>
Sender: fpst@hubcap.clemson.edu
Reply-To: vlo@xydeco.siemens.com (John Vlontzos)
Organization: Siemens Corporate Research, Inc.
Lines: 41
Approved: parallel@hubcap.clemson.edu

In article <12929@hubcap.clemson.edu> zenith@ensmp.fr (Steven Ericsson Zenith) writes:
>yarri@rainier.eng.ohio-state.edu (Douglas Yarrington) says about iWARP:
>
>   I'm interested in seeing how this type of processor encroaches on the
>   realm of fine-grained neural networks, so I'd like to find some
>   references, preferably recent, on the hardware structure. Could
>   someone point me in the right direction please.

>I'd say this type of processor does not at all encroache on the realm of
>fine-grained neural networks, for pretty much the same reason the
>transputer doesn't. When you talk about Neural Net silicon you need
>something closer to a memory device, not a CPU. Look out
>
>  "Analog VLSI and Neural Systems" by Carver Mead, 
>  published by Addison-Wesley. 1989
>

>Steven



Why do you say that you need something closer to a memory device?

ANNs can be implemented as a cascade of matrix-vector multiplications
and systolic arrays like the iWarp and others are very efficient in that.
By formulating ANN algorithms in matrix terms you avoid the need
for global communications since matrix multipliers have only
local connections. 

To see how it is done, take a look at proc. ICNN '88, proc. IJCNN '89
and proc ICASSP '89, '90 and IEEE Trans. ASSP Dec. '89

By the way, the only disadvantage the transputer has is its
serial links which make computation/communication unbalanced 
for systolic applications (remember that in systolic arrays
for every computation, you perform one or more data transfers
to a neighbor)

John Vlontzos
Siemens Corp. Research
Princeton N.J


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