Path: utzoo!censor!geac!torsqnt!news-server.csri.toronto.edu!bonnie.concordia.ca!thunder.mcrcim.mcgill.edu!snorkelwacker.mit.edu!usc!zaphod.mps.ohio-state.edu!wuarchive!uunet!cbmvax!daveh From: daveh@cbmvax.commodore.com (Dave Haynie) Newsgroups: comp.sys.amiga.advocacy Subject: Re: AMIGAstation... Message-ID: <19154@cbmvax.commodore.com> Date: 20 Feb 91 16:06:24 GMT References: <19110@cbmvax.commodore.com> <1991Feb16.180604.10623@magnus.ircc.ohio-state.edu> <12013@helios.TAMU.EDU> <1991Feb12.053906.10441@magnus.ircc.ohio-state.edu> <1991Feb16.062147.24843@NCoast.ORG> <2290@ria.ccs.uwo.ca> <2311@ria.ccs.uwo.ca> Reply-To: daveh@cbmvax.commodore.com (Dave Haynie) Organization: Commodore, West Chester, PA Lines: 47 In article <2311@ria.ccs.uwo.ca> ptoper@obelix (Andy Nagy) writes: > In reference to the memory map you posted earlier: > When C-A comes out with the super-duper-whiz-bang custom chip set (you >know the one with elevendy billion colours and forty million game ports (for >BLAZEMONGER, natch)) where does it go (in the memory map)? Well, there are those places marked RESERVED. We have lots of them on a 32 bit machine, but of course not quite so many on a 16/24 bit machine (eg, 68000). The actual location of anything new depends on what it needs. There is more space available, for example, for chip registers, in the standard 68000 I/O region. But you would be hard pressed to find a good place for another 2MB of Chip RAM, at least not without eating into Zorro II space, on a 68000 machine. > Also, just out of curiosity, what were the design decisions you used >to come up with this arrangement, ie were there any non-obvious constraints, >trade-offs etc? The main tradeoff started out as, do we enforce our original 32 bit addressing constraint by locating motherboard memory above 68000 space, or do we cut the folks who did it wrong yet another break. Once we took in the possibility of 16MB rather than 4MB, though, there was no choice to make. We had to have the extra space. > As a hypothetical question, would it be possible to implement >the ZorroIII bus using another processor ie 386, 466, i860, 32032(?) etc? Sure thing. While a few aspects of the Zorro III protocol uses 680x0 conventions; function codes, a bit of the vectored interrupt protocol, and byte ordering. But its mainly CPU independent, and it's even possible that some other CPU would hook up to Zorro III a little easier than the 68030. I didn't design Zorro III to make the life of the bus controller designer in a 68030 system easy (since it was me doing the design), but to do what I wanted to do in a 32 bit bus, within the constraints of the system, anyway. I suppose an i860 would be a little inefficient, with its 64 bit bus, but even that can be solved (the i860 would always want at least a two word burst cycle). Zorro III cycles are 32 bit only (ignoring Zorro II compatibility cycles), so just about any 32 bit CPU could run on it without a real difficult bus interface necessary. >Andy Nagy (ptoper@asterix.gaul.csd.uwo.ca) -- Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy "What works for me might work for you" -Jimmy Buffett