Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!sdd.hp.com!uakari.primate.wisc.edu!crdgw1!sixhub!davidsen
From: davidsen@sixhub.UUCP (Wm E. Davidsen Jr)
Newsgroups: comp.sys.ibm.pc.hardware
Subject: Re: i486 burst mode on Micronics MB?
Message-ID: <3283@sixhub.UUCP>
Date: 24 Feb 91 00:30:27 GMT
References: <12328.27af2b88@ecs.umass.edu> <3658@bruce.cs.monash.OZ.AU>
Reply-To: davidsen@sixhub.UUCP (bill davidsen)
Organization: *IX Public Access UNIX, Schenectady NY
Lines: 23

In article <3658@bruce.cs.monash.OZ.AU> herbie@bruce.cs.monash.OZ.AU (Andrew Herbert) writes:
| I'm uncertain about whether burst mode is used on Micronics boards, and am
| not even sure whether it's relevant in a 486 system with a secondary cache -
| any *informed* comment on this?

  I have some benchmarks from A.I.R showing that a motherboard with
burstmode benefits very little from external cache, maybe 10%. Since
they sell boards both ways, I can't see that they are trying to push
their system without cache.

  I did try disabling the external cache on a system we were testing at
work, but I don't remember which m.b. it was using. The effect was
measurable but not noticable.

  A system needs burst mode all the way from the memory to the CPU to
get full benefit, just burst mode between the CPU and external cache
doesn't make much sense. I don't know if this kludge is still offered by
any vendor.
-- 
bill davidsen - davidsen@sixhub.uucp (uunet!crdgw1!sixhub!davidsen)
    sysop *IX BBS and Public Access UNIX
    moderator of comp.binaries.ibm.pc and 80386 mailing list
"Stupidity, like virtue, is its own reward" -me