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From: jesup@cbmvax.commodore.com (Randell Jesup)
Newsgroups: comp.arch
Subject: 68040 and caches
Message-ID: <19330@cbmvax.commodore.com>
Date: 27 Feb 91 04:31:35 GMT
Reply-To: jesup@cbmvax.commodore.com (Randell Jesup)
Organization: Commodore, West Chester, PA
Lines: 22


	Random question concerning the 68040: what do people think about
the utility/cost effectiveness/need for external caches (given that it
has ?4-way? associative 4K I and D caches internally and a single
external bus.  What sort of speedups/cache size do you think you'd be
likely to get?  I would suspect you don't need as large caches as with 
most "risc" chips, because of the more complex, higher-density instructions,
but how much affect does this really have (are there any recent figures out
there)?

	What about external caches on other CISC's, such as 68030's, x86's
(yech), etc?  Certainly at some point you get insufficient gain for the
expense of adding more cache (I know, "insufficient" is a subjective term).
I'm interested in where people think the crossovers are (and I suppose for
RISC's too while we're at it).

-- 
Randell Jesup, Keeper of AmigaDos, Commodore Engineering.
{uunet|rutgers}!cbmvax!jesup, jesup@cbmvax.commodore.com  BIX: rjesup  
The compiler runs
Like a swift-flowing river
I wait in silence.  (From "The Zen of Programming")  ;-)