Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!samsung!zaphod.mps.ohio-state.edu!lavaca.uh.edu!menudo.uh.edu!sugar!ficc!peter
From: peter@ficc.ferranti.com (Peter da Silva)
Newsgroups: comp.arch
Subject: Re: 64-bits, How many years?
Message-ID: <+MR97B7@xds13.ferranti.com>
Date: 27 Feb 91 15:49:42 GMT
References: <9102171510.AA24745@lilac.berkeley.edu> <1991Feb18.163010.31688@m.cs.uiuc.edu> <3209@crdos1.crd.ge.COM> <1991Feb27.000601.1508@batcomputer.tn.cornell.edu>
Reply-To: peter@ficc.ferranti.com (Peter da Silva)
Organization: Xenix Support, FICC
Lines: 8

> Then why not design it for arbitrary length and just implement 48 bits
> for now?

How do you plan to allow for this in the instruction stream? What's the
word size? How big are the registers? How do you implement this?
-- 
Peter da Silva.  `-_-'  peter@ferranti.com
+1 713 274 5180.  'U`  "Have you hugged your wolf today?"