Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!zaphod.mps.ohio-state.edu!swrinde!elroy.jpl.nasa.gov!decwrl!mcnc!ecsgate!ecsvax!khj
From: khj@uncecs.edu (Kenneth H. Jacker)
Newsgroups: comp.arch
Subject: VAX ISP
Message-ID: <1991Mar2.173622.16992@uncecs.edu>
Date: 2 Mar 91 17:36:22 GMT
Reply-To: khj@ms.appstate.edu
Organization: Appalachian State Univ
Lines: 12

Can anyone suggest a reference for an ISP (instruction set processor)
description of the VAX CPU?  Ideally, I'd like to find the complete
specification.  At a minimum, I'd like ISP for the effective address
calculation for all addressing modes.

Thanks in advance for any help,

-- 
Kenneth H. Jacker            Domain:   khj@ms.appstate.edu
Dept of Math Sciences                  khj@ecsvax.uncecs.edu
Appalachian State Univ
Boone, NC  28608             BITNET:   khj@appstate