Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!coelho!drc
From: drc@coelho (David R. Coelho)
Newsgroups: comp.lang.vhdl
Subject: Re: Random Number generator in VHDL (was: VHDL Math packages)
Message-ID: <217@coelho>
Date: 1 Mar 91 08:18:13 GMT
References: <1991Feb7.152251.29436@src.honeywell.com> <1991Feb26.152236.5644@bnr.ca>
Reply-To: drc@coelho.UUCP (David R. Coelho)
Organization: Coelho Publications, Fremont, CA
Lines: 12

>In article <1991Feb7.152251.29436@src.honeywell.com>,
>carpent@SRC.Honeywell.COM (Todd Carpenter) writes:
>> 
>> RANDOM_pack.VHDL
>>   -- This has some interesting problems.  Namely, saving a seed.

An alternative approach I have taken to generating random numbers in
VHDL is to create a simple VHDL function which reads random numbers as
needed from an ascii text file using VHDL text I/O. I then wrote a simple
C program which creates the ascii text file. This keeps the VHDL package
tight and simple, and offers much greater flexibility in generating the
random data.