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From: torek@elf.ee.lbl.gov (Chris Torek)
Newsgroups: comp.unix.internals
Subject: Re: adjtime on a VAX?
Keywords: ICR timing
Message-ID: <10452@dog.ee.lbl.gov>
Date: 1 Mar 91 05:06:50 GMT
References: <1991Feb27.194230.3708@sci.ccny.cuny.edu>
Reply-To: torek@elf.ee.lbl.gov (Chris Torek)
Organization: Lawrence Berkeley Laboratory, Berkeley
Lines: 21
X-Local-Date: Thu, 28 Feb 91 21:06:51 PST

In article <1991Feb27.194230.3708@sci.ccny.cuny.edu>
jeffrey@sci.ccny.cuny.edu (Jeffrey L Bromberger) writes:
>... I'm peeking at the src at 4.3BSD, especially at the code for
>adjtime. ... splclock ... copies the contents of processor register
>$18 to r0 (the return value) and copies the value $0x18 into this same
>register.  Now, register $18 is the Interval Count Control (according
>to the VAX hardware handbook).

You have confused the value 18 with the value 0x18.  splclock() writes
to register 18, or 0x12, which is the IPL register.  It just so happens
that the level used to block clock interrupts is also 0x18, which helps
confuse matters.

adjtime() actually works by changing the amount the current time is
incremented on each clock interrupt.  That is, every 10 ms. (assuming
the default 100 Hz clock), the time is incremented by 11 ms. or 9 ms.
instead of 10 ms., so that after some number $n$ of these the total time
is $n$ ms ahead or behind where it would be otherwise.
-- 
In-Real-Life: Chris Torek, Lawrence Berkeley Lab EE div (+1 415 486 5427)
Berkeley, CA		Domain:	torek@ee.lbl.gov