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From: gsf@ulysses.att.com (Glenn S. Fowler)
Newsgroups: comp.unix.shell
Subject: Re: make(1) questions
Message-ID: <14382@ulysses.att.com>
Date: 27 Feb 91 15:20:09 GMT
References: <44683@ut-emx.uucp>
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Organization: AT&T Bell Labs
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In article <44683@ut-emx.uucp> pefv700@perv.pe.utexas.edu writes:
>I have 2 executables that are "made" using the same sources files.  The only
>difference is that for one a cpp(1) macro is defined, for the other it is not.
>
>It is obvious that if I keep everything in one directory, the best I can do is
>to work on one, then make would recompile all of the source files and then the
>other could be worked on.  This is acceptable.  However, I cannot think of a
>good way to let make know that executable 1 needs the .o files to have been
>made with the macro defined while for executable 2 it is just the opposite.

depending on your situation this might be suitable
given x.c, make a new file x-debug.c (you pick the name) that contains

	#define DEBUG 1	/* you pick the macros */
	#include "x.c"

then use makefile assertions like

	x : x.o ...
		...

	x-debug : x-debug.o ...
		...

Glenn Fowler    (908)-582-2195    AT&T Bell Laboratories, Murray Hill, NJ
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