Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!world!ksr!jfw
From: jfw@ksr.com (John F. Woods)
Newsgroups: sci.space.shuttle
Subject: New Shuttle Computers
Message-ID: <2352@ksr.com>
Date: 27 Feb 91 20:49:42 GMT
Sender: news@ksr.com
Lines: 26

The Electronic Engineering Times for 25 February 1991 has an article about
the new shuttle computers which are scheduled to fly on Discovery "next week."
The new AP101S computers use static-RAM memory and Schottky logic, replacing
the old core-memory AP101B computers.  A summary of the differences:

	       Memory					         First
	Memory  tech-     CPU       Size,    			 Shuttle
Computer size  nology     Speed     Weight    Power   MTBF	 Flight
AP101S  128Kx2 Radiation  1.2 Mips  1 box,    550W  20,000+ hrs. 3/91 STS-39
	32-bit resistant	    10x9x18'
	words  CMOS SRAM            64 pounds
AP101B  104Kx1 Ferrite    0.4 Mips  2 boxes,  650W   5,200 hrs.  4/81 STS-1
        32-bit cores		    10x8x19'
	words                       120 pounds

(I'm suspicious of the size figures; I'd expect them to be the same size,
and I have quite carefully preserved the single-tick foot unit indicator,
even though the box obviously does not dwarf the technicians next to it in
the front page photo... :-)

To improve the radiation resistance of the "radiation resistant" SRAMs,
they use 25 check-bits for each 16-bit halfword, and a background task
scrubs out soft ECC errors from all of memory every two seconds.

The article also includes a sidebar on complaints by IBM about how silly
NASA is about specifications and obsolete component qualification methods.