Path: utzoo!news-server.csri.toronto.edu!cs.utexas.edu!uunet!munnari.oz.au!metro!macuni!sunb!ifarqhar From: ifarqhar@sunb.mqcc.mq.oz.au (Ian Farquhar) Newsgroups: comp.sys.amiga.emulations Subject: Re: Emulator Mechanics (sorry long post) Message-ID: <1303@macuni.mqcc.mq.oz> Date: 6 Mar 91 12:57:34 GMT References: <4992@mindlink.UUCP> <1991Mar6.010141.5905@mintaka.lcs.mit.edu> Sender: news@macuni.mqcc.mq.oz Organization: Macquarie University, Sydney, Australia. Lines: 92 In article <1991Mar6.010141.5905@mintaka.lcs.mit.edu> rjc@pogo.ai.mit.edu (Ray Cromwell) writes: > The Mac is the easiest computer to emulate because it's not a computer >at all. The Macintosh computer does not exist, it's nothing more >than a ROM chip. The best description of a Mac I've ever read! :-) > I can't speak for other 6502 emulators, but if I wrote one, the fastest >method looks like table lookup, with careful optimization to make >sure things are long word aligned. For instance, I might do something like How about this? Write code for every one of the 256 possible opcodes, and make sure that it follows these important considerations: 1) The code is responsible for updating all registers, the 6502PC, and also for checking special functions if a hardware location is called. 2) It should be 256 bytes per opcode or less. 3) It should jump back to STLP (see below) when done. 4) It should intelligently introduce timing delays (very hard) 5) Something else I've forgotten. Take each piece of code, and distribute it in a 64K memory area, so that the code for opcode N starts at base + (n << 8). There may be a lot of wasted space, but on any reasonable Amiga, this space can be sacrificed for speed IMO. ; Base reg of instruction code in A0. 6502PC in A1. STLP MOVE.B (A1), lcna ; lcn is the upper byte of the ; dsp displacement below JMP dsp (A0) Excuse my poor 68K code. I think this will work, but it has been three years since I even looked at assembler on the 68000. Before anyone screams about this code failing on a 68030, remember that the modification made above is only needed until the JMP. After that, we do not need to see it again. If I read the info on the 68030 cache properly, this should be okay. At worst, the instruction cache can be disabled. This should be considerably faster than any table driven system. On any system with multi-byte opcodes (eg. the 8088), this system can be easily extended, and minor modifications can be made to emulate most modern CPU with reasonable speed. Now a suggestion for dealing with hardware locations (harder on memory mapped systems than on things like Intel and Zilog chips which have I/O instructions.) This is another memory-expensive solution, BTW. For every location, have two flags, one for read and one for write. If the opcode handlers write to the location, they can check the write flag and if it is set, call a handler which determines which location is being modified, and pass control to a routine to do it. Now for the VERY memory expensive solution. Have one 16 bit displacements per memory location (ie. for 1M of simulated RAM you must have 3M of real RAM.) This location contains the displacement from a base register to a routine which handles that memory location. If this word is non-zero, an instruction that reads or write to it calls this routine. You could even have two displacements, one for read and one for write, but this would only be practical for systems that have small amounts of simulated memory (eg. C64). At a rough estimate, for a C64 emulator (IMO the hardest of all emulators.) Simulated Memory 64K Read Displacements 128K Write Displacements 128K Opcode handlers 64K Memory Location Handlrs 28K (?) Rest 100K (??) ---- 512K So, for an average 1M Amiga, this is quite possible. As for the project, why not start with something much simpler? An Atari 2600 emulator. The hardware is quite simple to simulate, though the timing will have to be *very* precise. This would be a good starting point. Opinions, anyone? -- Ian Farquhar Phone : + 61 2 805-9400 Office of Computing Services Fax : + 61 2 805-7433 Macquarie University NSW 2109 Also : + 61 2 805-7420 Australia EMail : ifarqhar@suna.mqcc.mq.oz.au