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From: q4kx@vax5.cit.cornell.edu (Joel Sumner)
Newsgroups: comp.sys.apple2
Subject: 6502 `illegal opcodes' (repost)
Message-ID: <1991Mar3.234408.3129@vax5.cit.cornell.edu>
Date: 4 Mar 91 03:44:07 GMT
References: <462@rc6.urc.tue.nl>
Distribution: comp
Organization: CIT, Cornell University
Lines: 45

I saw this in alt.folklore.computers and thought it would be interesting.
Have fun...
--------------------------------

In article <462@rc6.urc.tue.nl>,
wsbusup@eutws1.win.tue.nl (Jan Stout) writes:
> In a recent posting someone asked for a lists of these, so I'll tell you
> what I know...
>
> The most usefull group of these illegal opcodes execute the 2 instructions
> having an opcode 1 & 2 lower, after another.
>
> For example:
> ORA follows ASL so the opcode following ASL executes first ASL then ORA (SLO)
>
> A list of new mnemonics that operate this way:
>
> AAX (STA STX)
> DCP (DEC CMP)
> ISC (INC SBC)
> LAX (LDA LDX)
> RLA (ROL AND)
> RRA (ROR ADC)
> SLO (ASL ORA)
> SRE (LSR EOR)
>
> Note that - AAX stores not the A, not the X but the A AND X.
>           - not all addressing modes are supported (notably not immediate)
>
> Further opcodes that are not documented either stop execution (KIL)
> or skip the next 0, 1, or 2 bytes (NOP, DOP, TOP).
> Finally there are a few codes with very exotic behaviour, but
> they seem not that usefull.
>
> More on this topic has been written in a german mag C64er.
> I even remember a dutch assembler (CD labelassembler), that knew 7 of the
> above mentioned opcodes.
>
> Jan Stout, wsbusup@eutws1.win.tue.nl
--
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