Path: utzoo!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!zaphod.mps.ohio-state.edu!rphroy!caen!math.lsa.umich.edu!math.lsa.umich.edu!hyc
From: hyc@math.lsa.umich.edu (Howard Chu)
Newsgroups: comp.sys.atari.st
Subject: Re: What the ST should be
Message-ID: <1991Mar5.014330.10601@math.lsa.umich.edu>
Date: 5 Mar 91 01:43:30 GMT
References: <1991Feb28.213727.46962@cc.usu.edu> <2864@krafla.rhi.hi.is> <1991Mar4.163632.353@midway.uchicago.edu>
Sender: usenet@math.lsa.umich.edu
Organization: University of Michigan Math Dept., Ann Arbor
Lines: 35

In article <1991Mar4.163632.353@midway.uchicago.edu> jcav@ellis.uchicago.edu (john  cavallino) writes:
>One thing to remember re: 68010 is that Motorola appears to want to phase it
>out soon.  They've always had problems with the part in terms of production
>yield and performance. (no, there is no 16mhz 68010).  The rumors I've heard
>are that Motorola is trying very hard to convince the few designers still
>looking at the 68010 to switch to the 68020 instead, to the point of pricing
>the '20 below the '10.  IMHO this is the right way to go.  Especially if the
>price is comparable, the 68010 has NO advantages over the 68020.

Well, for us lowly ST owners, it has one advantage - pin-compatibility
with the 68000. Although I guess even that's not true for all the 68000
package configurations now. (Which kinda sucks for us STe owners, where
TOS 1.6x can cope with the 68010 but you can't get one in the proper
packaging/pin configuration. What a drag... [Hm. Why doesn't someone
market an adapter socket or something? Sheesh!])

Back to the wish-list... How 'bout some dual-ported RAM, none of this
Video-always-wins bus hogging. I don't really understand what's going on
in the video hardware, obviously. Why does the video need to run at 16MHz
to produce an image on a 15.75khz display? What's really going on here?
I've seen mods that use an additional shifter chip to extend the pallete.
How 'bout doubling the clock rate on the shifter so we can get more resolution?
How 'bout giving us 8 or more bitplanes instead of just 1, 2, or 4?

Ok, moving right along... DRAM is pretty cheap now, even at reasonably fast
speeds. Why did the Mega STe require caching for 16MHz operation, why doesn't
the entire system allow normal accessing at 16MHz? Double all the relevant
clock rates, while you're at it - DMA bus, for example. I wonder how long
it'll be before we see an even faster version of the TT. (Ok, so ya can't run
at zero wait states with a 50MHz 68030 using human-priced DRAMs. But it'd
be nice to head that direction, eh?)
--
  -- Howard Chu @ University of Michigan

Flame all you want - we'll take more.