Path: utzoo!news-server.csri.toronto.edu!cs.utexas.edu!asuvax!stjhmc!p88.f15.n300.z1.fidonet.org!Lawson.English From: Lawson.English@p88.f15.n300.z1.fidonet.org (Lawson English) Newsgroups: comp.sys.mac.programmer Subject: VIA woes! Message-ID: <4301.27D4F060@stjhmc.fidonet.org> Date: 5 Mar 91 16:57:18 GMT Sender: ufgate@stjhmc.fidonet.org (newsout1.26) Organization: FidoNet node 1:300/15.88 - Tucson Apple Core, Tucson AZ Lines: 42 todd matthew morin writes in a message to All TMM> I've inherited an assembly language routine that was written TMM> a few years ago and writes directly to the mac VIA to enable TMM> millisecond accurate timing. Unfortunately, this code predates TMM> all but the MacPlus and SE (and the 512K, etc). The problem is TMM> that on newer machines, most notably the SE/30, unexpected crashes TMM> occur as a result of this code. Using MacsBug I've been able TMM> to figure that the program is crashing on an RTS instruction. TMM> The program itself (in which this timer is included), displays TMM> files on the screen synchronously with the vertical interrupt, TMM> then starts the timer. The SE/30 does not consistently crash TMM> at the same file being displayed, but only consistently on the TMM> RTS instruction. This leads me to believe that the SE/30 is doing TMM> something with VIA1 during the millitimer routine I too have some code that breaks with the newer systems. It doesn't seem to break due to hardware problems, but because we were using a low-memory global as a scratch address which is now overwritten. As far as I can tell, VIA1 should work as it always does. It does for my code, I simply have to rework the scratch address to work with post System 4.1 systems. It is an interactive profiler that examines all address space and graphs memory usage "on the fly." It uses the VIA to set an interupt every millisecond. When it was working, we could zoom into any heavily used area of memory and map the most used sections. It had accuracy from 1/256 of the total address space down to 2 bytes, so we could see single-machine-instruction bottlenecks. I suspect that your problem isn't with the VIA, it's System-dependent like mine was(is). The other possibility is a stack problem. There may be differences in the way the stack RTS is handled returning from an interupt. Lawson -- Uucp: ...{gatech,ames,rutgers}!ncar!asuvax!stjhmc!300!15.88!Lawson.English Internet: Lawson.English@p88.f15.n300.z1.fidonet.org