Newsgroups: comp.arch
Path: utzoo!utgpu!watserv1!watdragon!rose!ccplumb
From: ccplumb@rose.uwaterloo.ca (Colin Plumb)
Subject: Re: register save
Message-ID: <1991Mar12.115845.20736@watdragon.waterloo.edu>
Sender: daemon@watdragon.waterloo.edu (Owner of Many System Processes)
Organization: University of Waterloo
References: <3219@crdos1.crd.ge.COM> <12234@pt.cs.cmu.edu> <7403@mentor.cc.purdue.edu> <12269@pt.cs.cmu.edu> <1353@ncis.tis.llnl.gov>
Date: Tue, 12 Mar 1991 11:58:45 GMT
Lines: 24

turner@lance.tis.llnl.gov (Michael Turner) wrote:
>  Cooling down a little, I
>thought: maybe there's an idea--instead of optimizing architectures
>around how code *is*, perhaps it would make sense to look at how code
>*should* be.  Personally, I wouldn't mind using a machine that
>grossly penalized subroutines with more than 4 parameters, in exchange
>for some slightly greater reward for using fewer, because I seldom write
>code that uses more than 4 routinely, and *hate* inheriting code that
>does.

Well, I can live with 4 parameters as long as you don't want them to fit in
one register each.  If you write graphics code, you pass things like 3-vectors
(3 registers), basis matrices (9 registers), affine transformations (12)
and bicubic patches (16) around.

In integers, you often pass rectangle boundaries (4 registers) around.

In general, I'd like to suggest that asking the hardware to enforce
coding style is like killing ants with a sledgehammer.  Both too
effective and not effective enough.  You'll piss off people who have
good reason to want to do what they're doing, and people who want to
write bad code will continue to write bad code.
-- 
	-Colin