Path: utzoo!news-server.csri.toronto.edu!rutgers!usc!zaphod.mps.ohio-state.edu!lavaca.uh.edu!menudo.uh.edu!sugar!ficc!peter
From: peter@ficc.ferranti.com (Peter da Silva)
Newsgroups: comp.arch
Subject: Re: Translating 64-bit addresses
Message-ID: <5R+9C=A@xds13.ferranti.com>
Date: 12 Mar 91 14:52:17 GMT
References: <6590@hplabsz.HP.COM> <12030@pt.cs.cmu.edu> <6626@hplabsz.HP.COM> <PCG.91Mar9205121@aberdb.cs.aber.ac.uk> <92-9BOB@xds13.ferranti.com> <PCG.91Mar11144147@aberdb.cs.aber.ac.uk>
Reply-To: peter@ficc.ferranti.com (Peter da Silva)
Organization: Xenix Support, FICC
Lines: 15

In article <PCG.91Mar11144147@aberdb.cs.aber.ac.uk> pcg@cs.aber.ac.uk (Piercarlo Antonio Grandi) writes:
> People do IPC using pipes or System V MSGs or sockets which cost far far
> far more.

And the performance costs of this, and other results of getting the MMU
so intimately involved with things, is the main reason why a 27 MIPS
SparcStation 2 doesn't seem any faster than a 0.7 MIPS Amiga 1000. (Of
course, that begs the question of why a 2-3 MIPS Mac-II is just as slow
with no MMU overhead)

You're right... for systems with so much MMU overhead anyway giving
up shared memory is probably not such a big deal.
-- 
Peter da Silva.  `-_-'  peter@ferranti.com
+1 713 274 5180.  'U`  "Have you hugged your wolf today?"