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From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr)
Newsgroups: comp.arch
Subject: Re: register save
Message-ID: <3255@crdos1.crd.ge.COM>
Date: 12 Mar 91 22:52:05 GMT
References: <1991Mar11.192116.1974@dgbt.doc.ca> <912@spim.mips.COM>
Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen)
Organization: GE Corp R&D Center, Schenectady NY
Lines: 25

In article <912@spim.mips.COM> mash@mips.com (John Mashey) writes:

| 7) Finally, the really crucial thing in all of this is to understand
| how big a percentage of run time is spent in subroutine call overhead,
| and THEN, and ONLY THEN figure out if it's worth a lot of hardware
| to do something about it, especially if that hardware is very difficult
| to pipeline.  The evidence, so far, is that good compilers plus enough
| registers get rid of an awful lot of the overhead.  One can argue,

  Well I'm not about to argue but I may pose a question, in systems
which use register windows,  does someone have a good handle on the cost
of doing all the register to register I see just before a call? I see
some papers which show big gains by not moving data register to memory
to register putting arguments on a stack, but they seem to discount the
cost of the moves, and the reduced performance of the optimizer having
to treat a lot of registers as temps or plain unusable. I would have to
read some papers to clearly unstand how to measure the optimizer impact,
so if someone has done it speak up.

  Obviously there's a win in register windows if their large enough, but
I know know it isn't as big as the papers on RISC claim.
-- 
bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
        "Most of the VAX instructions are in microcode,
         but halt and no-op are in hardware for efficiency"