Path: utzoo!news-server.csri.toronto.edu!cs.utexas.edu!swrinde!zaphod.mps.ohio-state.edu!tut.cis.ohio-state.edu!ucbvax!dog.ee.lbl.gov!pasteur!galileo.berkeley.edu!jbuck From: jbuck@galileo.berkeley.edu (Joe Buck) Newsgroups: comp.dsp Subject: Re: A-law and u-law companding Message-ID: <11858@pasteur.Berkeley.EDU> Date: 10 Mar 91 20:18:43 GMT References: <1991Mar8.052136.11121@trl.oz.au> Sender: news@pasteur.Berkeley.EDU Reply-To: jbuck@galileo.berkeley.edu.UUCP (Joe Buck) Organization: U.C. Berkeley -- ERL Lines: 24 In article <1991Mar8.052136.11121@trl.oz.au> m.summerfield@trl.oz.au writes: >I am currently investigating implementation of A-law and u-law (that's >mu-law :-) companding techniques. I am aware of the formulae which are >used to generate these, however I am more interested in practical fast >software and digital hardware implementations, in which the calculation >of logarithms is impractical. No one computes logarithms to do u-law or a-law companding. Decompression is easy to accomplish with a lookup table: only 256 entries are required. You can go the other way in only a small number of instructions; I suggest checking out the handbook for any DSP chip; all that I've seen include fast algorithms for u-law and a-law compresion and expansion. >on the subject, I was wondering if anyone out there can point me in the >direction of any examples of previous work in this area. I would be >particularly interested in any examples of custom (VLSI) implementations. There's really a very small amount of computation required; it would be easy to do in hardware. -- -- Joe Buck jbuck@galileo.berkeley.edu {uunet,ucbvax}!galileo.berkeley.edu!jbuck