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From: hughes@eng3.hep.uiuc.edu (eric hughes)
Newsgroups: comp.lang.vhdl
Subject: subprograms with waits
Keywords: subprogram, wait
Message-ID: <1991Mar12.144030.1125@ux1.cso.uiuc.edu>
Date: 12 Mar 91 14:40:30 GMT
Sender: usenet@ux1.cso.uiuc.edu (News)
Organization: University of Illinois at Urbana
Lines: 4

I have a vhdl entity that contains several copies of the same
behavioral statements.  These statements contain signal assignments
and waits.  Is there some way I can group them into a subprogram?
I would like to have parameters to the subprogram if possible.