Xref: utzoo comp.lang.vhdl:103 comp.lang.misc:6846 comp.lsi.cad:861 Path: utzoo!news-server.csri.toronto.edu!rutgers!sun-barr!apple!voder!pyramid!ctnews!ios!garyt From: garyt@ios.Convergent.COM (Gary Tse) Newsgroups: comp.lang.vhdl,comp.lang.misc,comp.lsi.cad Subject: C to Verilog HDL Message-ID: <1133@ios.Convergent.COM> Date: 12 Mar 91 19:49:54 GMT Reply-To: Gary Tse Distribution: comp Organization: Raoul Duke School of Journalism Lines: 11 I have a stack of C code I need to translate to Verilog for logic synthesis. Does anyone have hints on the easiest way to do this? Does there exist a c2verilog type program? Any help would be appreciated. Please reply by email to garyt@Convergent.COM, and I will summarize if there is interest. -- Gary Tse, garyt@Convergent.COM || tse@soda.Berkeley.EDU "Contrariwise", continued Tweedledee, "If it was so, it might be; and if it were so, it would be; but as it isn't, it ain't. Thats logic."