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From: whitewolf@gnh-starport.cts.com (Tae Song)
Newsgroups: comp.sys.apple2
Subject: Re: Zip GSX
Message-ID: <m0jFE9Z-00003oC@jartel.info.com>
Date: 10 Mar 91 00:52:48 GMT
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X-Unparsable-Date: Sat Mar  9 91 at 16:39:08 (EST)

I'm not 100% sure on this, but as I understood it the cache controller would
or is running at twice the speed of the CPU and for a 20Mhz CPU you need a
80Mhz crystal and the Cache controller would divide the 80Mhz signal to 40 Mhz
for the cache controller and 20Mhz for the CPU on  the Zip GSX.


What ever happen to the ASIC Enterprise's AE165816 chip anyway???
 
whitewolf@gnh-starport!info-apple