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From: waltrip@capd.jhuapl.edu
Newsgroups: comp.sys.next
Subject: Re: Non-parity SIMS
Message-ID: <1991Mar11.101750.1@capd.jhuapl.edu>
Date: 11 Mar 91 15:17:50 GMT
References: <23938@hydra.gatech.EDU> <1991Mar11.045612.1764@mp.cs.niu.edu>
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In article <1991Mar11.045612.1764@mp.cs.niu.edu>, bennett@mp.cs.niu.edu (Scott
 Bennett) writes:
> In article <23938@hydra.gatech.EDU> gt5223b@prism.gatech.EDU (Doug Berkland)
 writes:
>>What are non-parity SIMS?
	[...]
>      The new, 68040-based NeXTs can be configured either w/parity or
> w/o parity, as you prefer.  I am told, however, that NeXT has screwed
> up the hardware design in those machines in a way that causes the use
> of parity memory to introduce wait states.
	Hmmm.  I'm not sure this is a screw-up.  I believe the wait states are
	only introduced when accessing memory--but most of the time (if all
	goes according to plan :^) you'll be running out of cache.  In
	practice, I doubt that the introduction of wait states will have much
	impact.
	[...]


c.f.waltrip

Internet:  <waltrip@capsrv.jhuapl.edu>

Opinions expressed are my own.