Path: utzoo!news-server.csri.toronto.edu!cs.utexas.edu!rice!uw-beaver!cornell!rochester!pt.cs.cmu.edu!gandalf.cs.cmu.edu!lindsay From: lindsay@gandalf.cs.cmu.edu (Donald Lindsay) Newsgroups: comp.arch Subject: Re: Data General NEW AVIION machine Message-ID: <12391@pt.cs.cmu.edu> Date: 18 Mar 91 00:16:31 GMT References: <40198@cup.portal.com> Organization: Carnegie Mellon Lines: 30 In article <40198@cup.portal.com> mslater@cup.portal.com (Michael Z Slater) writes: >MIPS ratings of multiprocessor machines aren't necessarily meaningful. >If I have one task I want to run, that 115 MIPS machine is only one-fourth >that speed. (It is a four-processor system.) Yes, but I would argue that all workstation and mini companies should have multiprocessors in their product line. It is a reasonable way to build server machines, for instance. [It's also a way to stay ahead of the IBM RS/6000, which reportedly won't be multiprocessor until 1995 or 1996.] Now that OSF/1 (with Mach's threads) is on the way, and with a thread SunOS reportedly on the way, and an IEEE standard for a C thread library, the way is open for portable multithreaded applications. (Of course, it isn't clear yet where these applications will become dominant, or whether the threading will be responsible for that success.) >The [large cache] size ... is especially useful in an MP system where >minimizing memory bus bandwidth used by each processor is critical. In theory, yes. However, I was pleasantly surprised to discover that a quad-processor Omron Luna (4 25 MHz 88000's) runs four copies of our ray-tracer, exactly as fast as it runs one copy. I hope to report soon on how fast it runs a single copy that has forked itself into four threads. -- Don D.C.Lindsay .. temporarily at Carnegie Mellon Robotics