Xref: utzoo sci.electronics:18532 misc.wanted:13949 Path: utzoo!news-server.csri.toronto.edu!cs.utexas.edu!swrinde!mips!mark From: mark@mips.com (Mark G. Johnson) Newsgroups: sci.electronics,misc.wanted Subject: Re: Looking for values of C for DRAM memory elements Message-ID: <1083@spim.mips.COM> Date: 17 Mar 91 17:59:37 GMT References: <91075.114646IO80900@MAINE.BITNET> Sender: news@mips.COM Followup-To: sci.electronics Organization: MIPS Computer Systems, Sunnyvale, California Lines: 26 Nntp-Posting-Host: hal In article <91075.114646IO80900@MAINE.BITNET> IO80900@MAINE.BITNET writes: >For a project that I am working on, I need to know the capacitances of >"typical" DRAM cells in use today (1-T). The best place to look is in the back issued of the IEEE Journal of Solid State Circuits; the October issues are about memory devices. Here's an excerpt: "Cell size is 4.0 x 9.0 microns, and the layout is shown in Figure 2. In this layout, the storage capacitor comprises 29 percent of the cell area, giving a cell capacitance of 32fF when a "1" is stored, and 35 fF when a "0" is stored. Differential signal at the sense amplifier is approximately 80-90 mV with Vcc=4.5V ..." ---- R. Taylor and M. Johnson, "A 1-Mbit CMOS Dynamic RAM with a Divided Bitline Matrix Architecture," IEEE Journal of Solid State Circuits, Vol SC-20, No.5, October 1985, pp. 894-902. For those who wondered: Yes, the cell capacitance is indeed nonlinear and varies with stored voltage. There is after all a PN junction involved. -- -- Mark Johnson MIPS Computer Systems, 930 E. Arques M/S 2-02, Sunnyvale, CA 94086 (408) 524-8308 mark@mips.com {or ...!decwrl!mips!mark}