Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!mips!cs.uoregon.edu!ns.uoregon.edu!milton!uw-beaver!mit-eddie!bbn.com!drilex!dricejb From: dricejb@drilex.UUCP (Craig Jackson drilex1) Newsgroups: comp.arch Subject: Re: 48-bit computers Message-ID: <24963@drilex.UUCP> Date: 21 Mar 91 04:31:18 GMT References: <6684@hplabsz.HP.COM> <1991Mar14.054359.27231@sma2.uucp> <1991Mar18.220827.27542@unislc.uucp> <1126@spim.mips.COM> Organization: DRI/McGraw-Hill, Lexington, MA Lines: 26 In article <1126@spim.mips.COM> mash@mips.com (John Mashey) writes: >In article <1991Mar18.220827.27542@unislc.uucp> ram@unislc.uucp (Ram Madduluri) writes: > >>Unisys A-Series machines are 48bit machines and are currently available >>in the market.... > >Is that true? I thought the A-series was 51 bits or more, upward-compatible >from B6500, etc. Did these go back to the 48 used by B5500? The A-Series, like the B6500 before it, has 48-bit words visible in the applications architecture. E-mode level Beta and Gamma machines also have 4 tag bits with each word; the B6500 had 3. All of the machines had various other bits associated with each word for parity, SECDEC, etc. If one wishes, one can consider the A-Series a 52-bit architecture from an operating systems viewpoint. However, the tag bits cannot take on arbitrary values--the meanings are defined by the hardware. From the view of applications other than compilers and linkers, it is a 48-bit machine. The tag bits are not addressable. (If they were, the machine would not be secure--the A-Series (and the B6500) have no hardware distinction between kernel and user mode.) -- Craig Jackson dricejb@drilex.dri.mgh.com {bbn,axiom,redsox,atexnet,ka3ovk}!drilex!{dricej,dricejb}