Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!helios!bcm!dimacs.rutgers.edu!rutgers!cbmvax!jesup From: jesup@cbmvax.commodore.com (Randell Jesup) Newsgroups: comp.arch Subject: Re: cache pre-load/no-load instructions Message-ID: <20054@cbmvax.commodore.com> Date: 23 Mar 91 03:29:16 GMT References: Reply-To: jesup@cbmvax.commodore.com (Randell Jesup) Organization: Commodore, West Chester, PA Lines: 37 In article jonathan@cs.pitt.edu (Jonathan Eunice) writes: >Two of the tweaks of the forthcoming "Snake" (HP-PA 1.1) systems from >HP are: > >1) cache pre-load instructions (the compiler inserts these into the >instr stream, and hopefully, the appropriate cache line will be available >by the time it's needed, avoiding delays and speeding up single-task >execution) Can be fairly effective, especially on a machine with long latencies and therefore more NOPs to fill in various places. Certain algorithms can get big wins from this sort of thing. Another interesting tweak (designed, never implemented, for the RPM-40 external cache chip) was access-knowlegable external cache. The cache would be told that accesses via a given register would normally have leaps of X words, and whenever an access was made via that register the cache would prefetch the line at . This can make certain types of algorithms (mainly array-based ones, like matrix multiplies) go much faster (instead of taking a miss on just about every memory access, they can approach a 100% hit rate for inner loops). X could also be negative, 0 (off), or 1 (i.e. sequential - it this is the end of a line, fetch the next one). The RPM-40 cache could enable or disable caching of stores based on what register they were stored via. It also had a conventional portion, writeback queue, and a context-stack cache. Items written to the stack cache would not be written to memory unless they were forced out by stack growth, or when otherwise unused main-memory cycles were available, or when instructed to by an instruction. Randell Jesup, former member of the RPM-40 backend-software/design team. -- Randell Jesup, Keeper of AmigaDos, Commodore Engineering. {uunet|rutgers}!cbmvax!jesup, jesup@cbmvax.commodore.com BIX: rjesup The compiler runs Like a swift-flowing river I wait in silence. (From "The Zen of Programming") ;-)