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From: lethin@ai.mit.edu (Richard A. Lethin)
Newsgroups: comp.lsi
Subject: SPICE parameters for a typical DRAM process?
Message-ID: <14194@life.ai.mit.edu>
Date: 20 Mar 91 02:46:34 GMT
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Organization: MIT Artificial Intelligence Laboratory
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I'd like to examine the SPICE parameters for a typical DRAM process.
Would someone be able to mail them to me, or point me in the right
direction to find such ?

Spice parameters for other processes: BIPOLAR, BICMOS, SRAM, EPROM,
EEPROM, and comparable LOGIC would also be good.  Are there any good
references that discuss the differences?