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From: lindsay@gandalf.cs.cmu.edu (Donald Lindsay)
Newsgroups: comp.arch
Subject: Re: cache pre-load/no-load instructions
Message-ID: <12487@pt.cs.cmu.edu>
Date: 26 Mar 91 16:23:26 GMT
References: <1991Mar24.151523.21921@cl.cam.ac.uk>
Organization: Carnegie Mellon
Lines: 17

In article <1991Mar24.151523.21921@cl.cam.ac.uk>
	cet1@cl.cam.ac.uk (C.E. Thompson) writes:
:::An instruction that zeroes a line in the data cache (without
:::fetching it).
::Unfortunately, IBM made these instructions privileged.
:Even if DCLZ and CLI did check protection, you have to allow for scenarios
:such as the following. User program touches a never-before-referenced page
:in a work segment; kernel allocates a real page frame and zeros it with DCLZ
:instructions (this must be the archetypal use of DCLZ in practice). Now the
:user program must *not* be allowed to use CLI on this page, or it could read
:the previous contents of the real page frame which the kernel was trying to
:hide from it.

I thought that read-uncached would check for valid cached data before
going to memory?  
-- 
Don		D.C.Lindsay .. temporarily at Carnegie Mellon Robotics