Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!crdgw1!crdos1!davidsen
From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr)
Newsgroups: comp.arch
Subject: Re: Coprocessors - Business?
Message-ID: <3299@crdos1.crd.ge.COM>
Date: 27 Mar 91 20:13:11 GMT
References: <2892@megatek.megatek.uucp>
Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen)
Organization: GE Corp R&D Center, Schenectady NY
Lines: 12

GE did a business instruction coprocessor in the 60's, but I don't know
of anyone doing it for micros. My recollection is that the Intel 386 has
two pins for coprocessor select, but my manual isn't sitting right here
so that may be wrong.

The discussion of kernel CPU vs smart controller could become more
interesting if someone made a general i/o processor as a coprocessor.
The best of both sides of the discussion.
-- 
bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
        "Most of the VAX instructions are in microcode,
         but halt and no-op are in hardware for efficiency"