Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sun-barr!decwrl!world!iecc!compilers-sender
From: chip@soi.com (Chip Morris)
Newsgroups: comp.compilers
Subject: Re: Exchange instructions
Keywords: optimize, design
Message-ID: <9103251415.AA26120@soi.com>
Date: 25 Mar 91 14:15:03 GMT
References: <1991Mar15.173551.13702@rice.edu> <9103162305.AA28314@curley.osf.org>
Sender: compilers-sender@iecc.cambridge.ma.us
Reply-To: chip@soi.com (Chip Morris)
Organization: Compilers Central
Lines: 16
Approved: compilers@iecc.cambridge.ma.us

David Keppel and Preston Briggs say that `exchange' is to CISCy.
I disagree.  Our compiler can make use of exchange instructions during
register alignment.  Very handy -- no temporary storage needed.  And
we prefer RISCs.  Of course, if adding EXCH costs chip real estate or cycle
time, then forget it.

The theoretical basis for using exchanges is in M. Karr's article
"Code Generation by Coagulation" in the 1984 SIGPLAN conference.

--
Chip Morris, Senior Engineer
Software Options, Inc., 22 Hilliard St., Cambridge MA 02138  (617) 497-5054
chip@soi.com
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