Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!jarthur!uunet!digibd!rhealey
From: rhealey@digibd.com (Rob Healey)
Newsgroups: comp.sys.3b1
Subject: RTS on hardware flow control
Message-ID: <1991Mar26.065606.9989@digibd.com>
Date: 26 Mar 91 06:56:06 GMT
Sender: rhealey@digibd.com (Rob Healey)
Distribution: na
Organization: DigiBoard Incorporated, St. Louis Park, MN
Lines: 17


	Does anybody know how the 3b1 handles RTS when hardware flow control
	is on, i.e. does it lower RTS when it's input buffer is almost full
	and then raise it after the buffer has drained a bit?

	In a related question, does anyone know where in the kernel .o
	or cmb.o scheme of things where the hardware flow control code
	is? So as an industrious soul might try to fix it if it's broke...

	What the hey, any idea if it would be non trivial to add the
	code to do xon/xoff flow while hardware flow is on, i.e. reenable
	the ixon processing? There musta been a reason why they turned
	this off, anybody know what that reason is?

		 Thanks,

		-Rob