Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!swrinde!cs.utexas.edu!uunet!auspex!guy
From: guy@auspex.auspex.com (Guy Harris)
Newsgroups: comp.arch
Subject: RISC integer multiply/divide (was Re: Snake)
Message-ID: <6920@auspex.auspex.com>
Date: 30 Mar 91 22:52:04 GMT
References: <69465@brunix.UUCP> <32580004@hpcuhe.cup.hp.com> <1991Mar26.221120.6725@webo.dg.com>
Organization: Auspex Systems, Santa Clara
Lines: 20

>Are the new PA machines binary compatible with the old ones?  Reading
>the press, it sounds like there are new instructions in the new 
>machines so that while the old programs will run, the full performance
>will not be achieved unless you recompile.  Is this true?

I saw something that indicated that integer multiply and divide
instructions have been added to HP-PA, and that the chips in the new
machine, I think, implement them.

SPARC has also added them in Version 8 of the SPARC architecture; the
"Implementation Characteristics" appendix indicates that the Matsushita
MN10501 chip (I think that's the chip used in some Solbourne machines)
implements the multiply (but not divide) instructions.

I think the IBM ROMP had no integer multiply or divide instructions;
the POWER architecture does.

Are there any remaining RISC holdouts that originally didn't have
integer multiply and divide, and that haven't added those instructions
to their architectures?