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From: mohta@necom830.cc.titech.ac.jp (Masataka Ohta)
Newsgroups: comp.arch
Subject: Re: Segmented Architectures ( formerly Re: 48-bit computers)
Message-ID: <7481@titcce.cc.titech.ac.jp>
Date: 31 Mar 91 07:27:22 GMT
References: <1991Mar27.172325.10800@sj.nec.com> <00670208556@elgamy.RAIDERNET.COM>
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Organization: Tokyo Institute of Technology
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In article <00670208556@elgamy.RAIDERNET.COM>
	elg@elgamy.RAIDERNET.COM (Eric Lee Green) writes:

>This doesn't mean that segments are
>a bad idea, though.

Architecutual support for segmentation is a bad idea. On a flat addressed
architecture, segment can be done easily by software.

>3) Mapping shared objects into the address space.
>    This can be done on a machine with a "flat" address space, of course.
>But if you want to do 2) above, have a large shared object that shrinks and
>grows (let's say, perhaps, you want to share an editor buffer between the
>editor and compiler), you have problems. If the shared object contains
>embedded addresses, e.g. it's a linked list or B-Tree or other such data
>structure, you have even worse problems... basically, it can't be done, not
>without mapping the object into the same addresses in each address space
>(which has collision potential... what if some other desired object is also
>mapped at that same address space?). The "solution", for flat address space
>people, is simply not to do it, to use shared memory only as an IPC
>mechanism rather than as a method of truly sharing objects.

With segmented architecture, to have embedded addresses, you have problems
how to secify segment number.

If the segment number is also embedded (which is unavoidable for an inter-
segment pointer), the number must have the same meaning on all related
processes. If it is possible, it is also possible, on flat addressed
machine, to assign the same addresses to simulated segments.

BTW, not assigning the same virtual address to the shared memory is often
impossible, because on some architecture, aliasing problem related to
cache and virtual-to-physical address translation exists.

If the segment number is implicitely specified, it can be simulated, on flat
addressed machine, to have embedded address offset and a base register.
Adding a base register on address calculation is only as slow as adding
a segment register.

						Masataka Ohta