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From: amos@SHUM.HUJI.AC.IL (amos shapir)
Newsgroups: comp.arch
Subject: Re: Segmented Architectures ( formerly Re: 48-bit computers)
Message-ID: <1044@shum.huji.ac.il>
Date: 31 Mar 91 13:39:29 GMT
References: <1991Mar27.193512.12417@cello.hpl.hp.com>
Sender: daemon@ucbvax.BERKELEY.EDU
Reply-To: amos@shum.huji.ac.il
Organization: The Hebrew University of Jerusalem
Lines: 24

[Quoted from the referenced article by renglish@cello.hpl.hp.com (Bob English)]
>
>The segment sizes this forum has rejected out of hand address 4GB of
>memory.  For all objects less than that segment size, a load of a
>segment register to access the object should take exactly one cycle per
>access to the object.

>In programs with less than 4GB
>of data (and there are a few of them available in the world), this
>segment register has to be loaded once per context switch, hardly
>significant in these days of large CPU contexts.
>

One case you forgot is that of many small segments, which together
amount to more than one segment size.  You could end up thrashing
between different segments even if no single object is big enough
to overflow a segment; all the arguments about big objects do not
hold in this case.


-- 
	Amos Shapir		amos@shum.huji.ac.il
The Hebrew Univ. of Jerusalem, Dept. of Comp. Science.
Tel. +972 2 585257 GEO: 35 14 E / 31 46 N