Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!sdd.hp.com!hplabs!hpcc05!hpcuhb!hpcuhe!linley
From: linley@hpcuhe.cup.hp.com (Linley Gwennap)
Newsgroups: comp.arch
Subject: Re: Snakebytes (long -- and poisonous?).
Message-ID: <32580010@hpcuhe.cup.hp.com>
Date: 1 Apr 91 23:10:17 GMT
References: <1998@kuling.UUCP>
Organization: PA-RISC Marketing Central
Lines: 21

> Are you saying LOAD and STORE instructions take 1 cycle? !??!
> I thought the 700 took 2-4 cycles, like most machines.
> Can you at least overlap loads and stores if you use separate
> registers, for applications like bcopy()?
> -- 
> # Bill Stewart

In "real life", loads take 2 cycles and stores take 3 cycles on the
Series 700 processors.  However, the CPU will appear to execute loads
and stores in a single cycle as long as there is no interlock or
dependency on the target register.  The compiler will usually schedule
instructions to avoid such interlocks.  In your example, loads and
stores can be overlapped so long as separate registers are used.

To address another question (I'm try to restrict myself to one posting
here), HP is committed to delivering OSF/1 on the Series 700 by the
end of the year (1991).  OSF/1 is not available for immediate delivery.
Thus, no problems with excessive bugs and/or changes.

						--Linley Gwennap
						  Hewlett-Packard Co.