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From: firth@sei.cmu.edu (Robert Firth)
Newsgroups: comp.arch
Subject: Re: Segmented Architectures ( formerly Re: 48-bit computers)
Message-ID: <23507@as0c.sei.cmu.edu>
Date: 2 Apr 91 13:20:13 GMT
References: <1991Mar21.164242.886@sj.nec.com> <efeustel.669650766@tiger1> <23189@as0c.sei.cmu.edu> <56399@sequent.UUCP>
Reply-To: firth@sei.cmu.edu (Robert Firth)
Organization: Software Engineering Institute, Pittsburgh, PA
Lines: 39

In article <56399@sequent.UUCP> dafuller@sequent.UUCP (David Fuller) writes:

>I would tend to ally with Ed Fuestel here; if you look at the 8086   
>scheme it fits really well for Pascal:
>
>4 segments, one each for code, data, heap and stack.

Then you have solved a problem that stumped me, back when I was faced
with exactly this problem - design a Pascal compiler for the 8086.  I
would be most interested in your answer.

Consider this typical Pascal procedure

	procedure P(var V : T);

This takes a formal of some type T, passed by reference.  Within the
body of P, any operation upon V is an operation upon the corresponding
actual.

Now consider what that actual might b, when P is called.  It could be
any of

	outermost-level variable, allocated statically
	local variable, allocated on the stack
	object created by New(), allocated from the heap
	by-value parameter, passed on an inner call
	by-reference parameter, likewise
	a component of any of the above, selected or indexed

My question is this: what strategies did you adopt, for address
space representation, variable allocation, and by-reference parameter
passing, that was sane, efficient, and made use of the hardware
segmentation?  The answer matters to me, since my failure to solve
the problem still annoys me.

(I'd be interested to hear what anyone else has to suggest, too.
Just to nail things down, take the language to be ISO Pascal Level
1, and the machine to that defined in the 8086 Family Users Manual
of October 1979)