Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!swrinde!cs.utexas.edu!oakhill!bryant From: bryant@oakhill.sps.mot.com (Bryant Wilder) Newsgroups: comp.lang.vhdl Subject: VHDL and M language interoperability--anyone have experience?? Message-ID: <1991Apr2.214724.9835@oakhill.sps.mot.com> Date: 2 Apr 91 21:47:24 GMT Organization: Motorola Inc., Austin, Texas Lines: 11 in our group we use silicon compiler system tools' M modeling language for our high level chip block simulations. we would like to use synopsys inc.'s logic simulation tool also, but synopsis only supports VHDL at the present time. does anyone have any experience with both M and VHDL who would care to comment openly or privately about how to make VHDL communicate with M. thanks, bryant wilder at motorola dsp operation 512 891 2033