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From: sking@nowhere.uucp (Steven King)
Newsgroups: comp.os.msdos.programmer
Subject: Re: interrupt priorities/swapping
Message-ID: <1991Apr01.054006.2648@nowhere.uucp>
Date: 1 Apr 91 05:40:06 GMT
References: <1991Mar19.131959.8841@uwovax.uwo.ca> <10586@uwm.edu>
Organization: American Anarchist Union
Lines: 35

In article <10586@uwm.edu> markh@csd4.csd.uwm.edu (Mark William Hopkins) writes:
>In article <1991Mar19.131959.8841@uwovax.uwo.ca> bangarth@uwovax.uwo.ca writes:
>>Where can I find a good discussion on interrupts?
>
>Here. :)
>
>From highest to lowest:
>   Divide Overflow (INT 0),
>   INT n,
>   INTO (which is the overflow interrupt = INT 4),
>   NMI (non-maskable interrupt = INT 2)
>   External interrupt on INTR line (INT 8 to INT f (hex)).
>   Single-step interrupt (INT 1).
>
>INTR's ultimately come from hardware lines on the system board (Timer = 8,
>Keyboard = 9, (a is reserved), COM2 = b, COM1 = c, Disk = d, Diskette = e,
>Printer = f) and are called respectively interrupt requests (IRQ) 0 to 7.
>

   A good source of information is the intel reference manuals.

   Priority of the external interrupts, relative to each other, is a
 determined by the programming of the external interrupt controller(s),
 normally (always?) 8259A's. The 8259A is documented in most every
 intel micro or peripheral handbook throughout the 80's. Its pretty
 straight forward ( for an intel chip ) to program. However,
 re-programming it to change interrupt priorities probably isnt
 advisable unless you are certain of the requirements of the
 other hardware...

 
-- 
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It ain't from Texas.
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