Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!pacific.mps.ohio-state.edu!linac!att!ucbvax!techunix.BITNET!devil From: devil@techunix.BITNET (Gil Tene) Newsgroups: comp.sys.hp Subject: HP9000-7XX overflow : Technical question Message-ID: <9934@discus.technion.ac.il> Date: 2 Apr 91 20:23:29 GMT Sender: daemon@ucbvax.BERKELEY.EDU Reply-To: devil%techunix.bitnet@lilac.berkeley.edu (Gil Tene) Organization: Technion, Israel Inst. of Technology Lines: 36 Hello HPeople, Question boils down to (explanation of motivation below) : How do I do integer overflow detection on a 9000-7xx ? (using machine code is OK) Is it possible? Is it "cheap"? can it be done? can it be done without using a whole signal call mechanism every time an overflow occurs? Motivation: I am thinking of porting a very high-CPU-consumption application of mine that does Real Time simulation of some CPU (old) to the new HP snake family. I have this spplication running on a 375. In this application I do alot of machine code generation for the simulated CPU instructions, sort of "on the fly" compilation of one machine code to another. One of the key features that must be properly simulated is the old CPU's overflow behaviour. I seem to remember that the 800's RISC architecture doesn't have overflow flags. I currently use the 68xxx's overflow flags for overflow detection. Without this flag, or some other simple integer overflow detection method (that is "cheap") I will have to imbed generated code that will test for overflow conditions on every simulated instruction (instead of a simple flag check). AdvThanks, -- Gil. -- -------------------------------------------------------------------- -- Gil Tene "Some days it just doesn't pay -- -- devil@techunix.technion.ac.il to go to sleep in the morning." -- --------------------------------------------------------------------