Path: utzoo!utgpu!cunews!bnrgate!brtph3!brchh104!brchs1!bnr.ca!rice.edu!sun-spots-request
From: ballen@convex.csd.uwm.edu (Bruce Allen)
Newsgroups: comp.sys.sun
Subject: Re: Sparcstations: A Guide for Compiler Writers
Keywords: Miscellaneous
Message-ID: <2310@brchh104.bnr.ca>
Date: 2 Apr 91 15:00:00 GMT
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Organization: Sun-Spots
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Approved: Sun-Spots@rice.edu
X-Original-Date: 31 Mar 91 16:28:36 GMT
X-Refs:  Original: v10n72
X-Sun-Spots-Digest: Volume 10, Issue 75, message 6
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I enjoyed your summary of machine-level instruction speeds.  I have a
question regarding cache size on the SS2.  According to the Sun Observer,
December 1990, page 1, "The SS2 also uses Cypress' 16K x 16 Cache Storage
Unit (the CY7C157)".  However according to Sun's US Price list (November
5, 1990, page 31) the SS2 features "64 Kbyte Write- Through Cache".  Are
these two statements inconsistent (16K x 16 =  256K)?  If so, who is
correct?  If not, why are they the same?

		Bruce Allen