Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!mips!cs.uoregon.edu!ns.uoregon.edu!milton!sumax!amc-gw!pilchuck!ssc!markz
From: markz@ssc.UUCP (Mark Zenier)
Newsgroups: sci.electronics
Subject: Re: PAL/GAL/EPLD's
Message-ID: <890@ssc.UUCP>
Date: 29 Mar 91 20:18:31 GMT
References: <1991Mar25.235506.13440@massey.ac.nz> <970023@hpdmd48.boi.hp.com> <2492@umriscc.isc.umr.edu>
Organization: SSC, Inc., Seattle, WA
Lines: 27

In <2492@umriscc.isc.umr.edu>, robf@mcs213j.cs.umr.edu (Rob Fugina) writes:
> In <970023@hpdmd48.boi.hp.com> ahill@hpdmd48.boi.hp.com (Andy Hill) writes:
> >Shoot, if you only need three of the silly things, why don't you just
> >program it into a PAL?  
> 
> Since someone mentioned these things a few days ago, I've tried to find info
> about them...  
> No source on campus for the actual chips, though.  

Active (800 677-8899) and Arrow (800 93A-RROW) and JDR (see the back of
Computer Shopper) sell PLDs.

> they let me borrow some books...(Lattice, TI, Cypress, and Altera data books)
> but the books have nothing specific about the format of the spec file needed
> to program the chips.  

Usually you end up using vendor or third party (ABEL, CUPL ...) design
software.  Sort of like a compiler where you don't worry about what
the object module file format is.

> I'd like a beginner-type book on this stuff.

A good book is "Programmable Logic Designer's Guide" by Roger C. Alford
published by Howard W. Sams, 1989.  It covers device architecture, and
design software.  

Mark Zenier   markz@ssc.uucp  mzenier@polari.uucp