Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!snorkelwacker.mit.edu!bloom-beacon!eru!hagbard!sunic!mcsun!hp4nl!charon!dik From: dik@cwi.nl (Dik T. Winter) Newsgroups: comp.arch Subject: Re: RISC integer multiply/divide (was Re: Snake) Message-ID: <3256@charon.cwi.nl> Date: 4 Apr 91 01:10:56 GMT References: <6920@auspex.auspex.com> <3237@charon.cwi.nl> Sender: news@cwi.nl Organization: CWI, Amsterdam Lines: 24 In article meissner@osf.org (Michael Meissner) writes: > In article <3237@charon.cwi.nl> dik@cwi.nl (Dik T. Winter) writes: > | Now this is a bit slippery (checking the 32*32->64 bit multiply and > | 64/32->32,32 bit divide; this may be old hat, and, what is RISC?): > > | m88k: full support (no remainder & no 64 bit res/src, uses FP) > > While it doesn't have a 32x32->64 bit multiply, the multiply unit is > pipelined, so that you can do a 32x32->64 bit multiply in about 13 > clocks (including separating the two 32 bit numbers into 16 bit > pieces, doing 4 pipelined multiplies, and merging the results). Yes, I know. I have in my archives a routine to do that in 18 clocks. Possibly a some cycles could be shaved off. It was posted over a year ago by Alan Lovejoy at AT&T Paradyne. Some updates (newer information on hppa, and I added also arm and clipper): hppa: full multiply support, division through divide step arm: no divide or divide step, multiply is 32*32->32 clipper:full mult, separate div and rem and 32/32 only -- dik t. winter, cwi, amsterdam, nederland dik@cwi.nl