Newsgroups: comp.arch Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!uupsi!grebyn!ckp From: ckp@grebyn.com (Checkpoint Technologies) Subject: Re: Segmented Architectures ( formerly Re: 48-bit computers) Message-ID: <1991Apr4.174420.3507@grebyn.com> Organization: Grebyn Timesharing References: <3310@crdos1.crd.ge.COM> <1991Apr04.023845.3501@kithrup.COM> Date: Thu, 4 Apr 1991 17:44:20 GMT In article <1991Apr04.023845.3501@kithrup.COM> sef@kithrup.COM (Sean Eric Fagan) writes: >In article peter@ficc.ferranti.com (Peter da Silva) writes: >>And then on top of all >>that we have all the segmentation woes. > >Are you objecting to segments, or to *intel* segments? Well, Intel segments are *soooo* bad.... Here are (what I think) are the unforgivably bad features of Intel x86 segments: - Huge pointers require normalization - There are fewer segment registers than address registers (I include the program counter and stack pointer as address registers) - They are context-chosen (code space, data space, stack space) - The instruction set encourages programmers to economize segment useage > You keep saying >"segments are bad," without regard to what type of segments. Consider, for >example, a cpu which has two type of registers: data and address. Data >registers are 32-bits, and address registers are 64-bits. *However*: the >address registers are actually Perhaps we can get some subjective comments data from programmers of other "segmented" machines? I can think of two. The Western Design 65816 in 16 bit mode, and the Zilog Z8000 both are "segmented" machines. How about some comments on these implementations? (I don't mean to solicit "the 65816 is *way* better than the 6502" comments...) -- First comes the logo: C H E C K P O I N T T E C H N O L O G I E S / / ckp@grebyn.com \\ / / Then, the disclaimer: All expressed opinions are, indeed, opinions. \ / o Now for the witty part: I'm pink, therefore, I'm spam! \/