Newsgroups: comp.arch Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!uupsi!ficc!peter From: peter@ficc.ferranti.com (Peter da Silva) Subject: Re: Segmented Architectures ( formerly Re: 48-bit computers) Message-ID: Organization: Xenix Support, FICC References: <7920@uceng.UC.EDU> <3310@crdos1.crd.ge.COM> <1991Apr04.023845.3501@kithrup.COM> Date: Thu, 4 Apr 91 17:10:17 GMT In article <1991Apr04.023845.3501@kithrup.COM>, sef@kithrup.COM (Sean Eric Fagan) writes: > In article peter@ficc.ferranti.com (Peter da Silva) writes: > >And then on top of all > >that we have all the segmentation woes. > Are you objecting to segments, or to *intel* segments? Intel segments. > You keep saying "segments are bad," without regard to what type of segments. No, I keep ragging on the 80x86. I explicitly mentioned the chip by name in the paragraph you quoted from. [32-bit address+32-bit segment number, stored in the address registers] > I defy you to come up with a PROPERLY WRITTEN program that will break. If wrapping around the end of the segment isn't a problem, I can't. If it is, I'll just operate on a >4 GB object. Of course, if wrapping around the end of the segment isn't a problem (as it wouldn't be on the 80x86 is intel hadn't screwed up) then I would say you don't have a segmented machine: you just have a 64-bit machine with a possibly limited address space... like the 68000, where you can look at the address space as a 24-bit offset and an (initially ignored) 8-bit segment number. That's how Microsoft treated the poor little chip for their Basic interpreters on the Mac and Amiga, which is why my Amiga 3000 doesn't have Basic available. > segment be tag #0, incidently, although there is no real need.) Note that > you would also probably need a 'long long' type, since I seem to recall ANSI > C requiring *some* integral type that can hold a pointer. Nah, just make int=32 bits, long=64 bits. > That could actually be quite useful. Have each malloc() return a seperate > segment, which is the size you requested and no larger... You can do the same on a "flat" address space machine if your address space is large enough. DEC does this on the VAX under VMS: 31 bit offset and two segments: user and system. > Intel goofed (imho) by having seperate segment registers. No, intel goofed by putting tag bits at the wrong end of the segment register. Whether the segment part is explicitly loaded into a segment register or the top half of an address register is purely a code generation problem. -- Peter da Silva. `-_-' peter@ferranti.com +1 713 274 5180. 'U` "Have you hugged your wolf today?"