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From: jones@pyrite.cs.uiowa.edu (Douglas W. Jones,201H MLH,3193350740,3193382879)
Newsgroups: comp.arch
Subject: Re: Segmented Architectures ( formerly Re: 48-bit computers)
Message-ID: <5277@ns-mx.uiowa.edu>
Date: 4 Apr 91 20:59:10 GMT
References: <4919@lib.tmc.edu>
Sender: news@ns-mx.uiowa.edu
Lines: 33

In article <23615@as0c.sei.cmu.edu> firth@sei.cmu.edu (Robert Firth) writes:
>In article <1991Apr04.023845.3501@kithrup.COM>
>sef@kithrup.COM (Sean Eric Fagan) writes:
>
>>I defy you to come up with a PROPERLY WRITTEN program that will break.
>
>My pleasure, sir.
>	DIMENSION BIGMAT(50000,50000)
>	DOUBLE PRECISION BIGMAT

People forget history so quickly these days!  The Burroughs 5000 and
descendants all used segmented architectures, and they routinely handled
two dimensional arrays as an array of pointers to segments.  That is
precisely how Burroughs FORTRAN would have handled the above case, and
if 50000 double's was too big for one segment, it would have automatically
made the array into a 3 or 4 dimensional array, completely hiding the
problem from the programmer without any need for the programmer to specify
some kind of "large memory model" or other such hocum that people are
forced to do on the 8086 family.

I remember a statistic from Burroughs that the average segment on their
machines was less than 64 words long (48 bits per word).  The code of
each procedure was in a different segment, each array was a different
segment, and so on.

I never heard a Burroughs programmer complain about segments the way 8086
programmers do because the Burroughs architectures did it right!  I've
had a number of students who were Burroughs programmers (Quaker Oats in
Cedar Rapids had a high-end machine with something like 6 CPU's in the
early 80's, and they may still be a Unisys customer).

				Doug Jones
				jones@cs.uiowa.edu