Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!elroy.jpl.nasa.gov!decwrl!pa.dec.com!decuac!grebyn!ckp From: ckp@grebyn.com (Checkpoint Technologies) Newsgroups: comp.arch Subject: Re: Segmented Architectures ( formerly Re: 48-bit computers) Message-ID: <1991Apr5.054215.16304@grebyn.com> Date: 5 Apr 91 05:42:15 GMT References: <3310@crdos1.crd.ge.COM> <1991Apr04.023845.3501@kithrup.COM> Organization: Grebyn Timesharing Lines: 25 In article peter@ficc.ferranti.com (Peter da Silva) writes: >possibly limited address space... like the 68000, where you can look at >the address space as a 24-bit offset and an (initially ignored) 8-bit >segment number. That's how Microsoft treated the poor little chip for >their Basic interpreters on the Mac and Amiga, which is why my Amiga 3000 >doesn't have Basic available. I had wondered... The 68K line, at least through the 68030, has 8 possible address spaces as coded by the CPU's FC lines. One is user program, one is user data, one is supervisor program, one is supervisor data, one is "CPU space" and is used to address coprocessors, generate interrupt acknowledgements, and signal breakpoints, and the other three are undefined. You can program the 68851 PMMU and the 68030's MMU to choose from 8 different page tables based on the FC code, and there's the MOVES instruction for choosing your FC directly when performing a move. The 680[23]0 manual tells how to generate cycles to program space for data accesses if it's important. Does this make the 68K a segmented machine, with 32 bits offset and 3 bits segment number? (Expiring minds want to know...) -- First comes the logo: C H E C K P O I N T T E C H N O L O G I E S / / ckp@grebyn.com \\ / / Then, the disclaimer: All expressed opinions are, indeed, opinions. \ / o Now for the witty part: I'm pink, therefore, I'm spam! \/