Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!cs.utexas.edu!oakhill!eric
From: eric@oakhill.sps.mot.com (Eric Cheval)
Newsgroups: comp.dsp
Subject: Re: A-law and u-law companding
Message-ID: <1991Apr2.232434.8179@oakhill.sps.mot.com>
Date: 2 Apr 91 23:24:34 GMT
References: <1991Mar8.052136.11121@trl.oz.au> <11858@pasteur.Berkeley.EDU>
Reply-To: eric@paris.UUCP (Eric Cheval)
Organization: Motorola Inc., Austin, Texas
Lines: 26

In article <11858@pasteur.Berkeley.EDU> jbuck@galileo.berkeley.edu.UUCP (Joe Buck) writes:
>In article <1991Mar8.052136.11121@trl.oz.au> m.summerfield@trl.oz.au writes:
>>I am currently investigating implementation of A-law and u-law (that's
>>mu-law :-) companding techniques. I am aware of the formulae which are
>>used to generate these, however I am more interested in practical fast
>>software and digital hardware implementations, in which the calculation
>>of logarithms is impractical.
>>on the subject, I was wondering if anyone out there can point me in the 
>>direction of any examples of previous work in this area. I would be
>>particularly interested in any examples of custom (VLSI) implementations.

The Motorola 56116/56156 SSIs implement the A/MU law compression
/decompression as an option. The necessary logic was designed in
and it is transparent to the user; all you need to do is to 
select a mode bit. the implementation is proprietary.

The laws, A/Mu, are linear by segment, and by studying 
the CCITT specification (Rec G711; Fascicle III.3 pp 68-71)
you can figure out the necessary logic.

You can also get the Motorola app. note on the 56000/1
compression/expension; the CCITT tables are reproduced.

Eric Cheval
Motorola DSP Group
Austin TX.